The second day featured 5 key presentations. The first one was on Design for test consideration in SOC by Mr.V.R.Seshadri, General Manager, GDA Technologies, Chennai. In this talk, he pointed out the role of SoC, ASICs in the electronics appliances today, and focussed on the verification of SoC (which is a major issue in the design flow). DFT techniques that are used to reduce the cost of the tests by using the automatic test pattern generation (ATPG), scan insertion, built-in self test (BIST) and boundary scan methods and applications of the DFT’s in the SoC design flow were also discussed. The second address by Mr.K.V.Kumaraswamy, Senior Application Engineer, Cadence Design Systems, Pvt. Ltd., Bangalore gave on insight into SoC design flow. Starting with an introduction of SOC, he discussed technical challenges in verification, with large demand on increased speed and efficiency. He then focussed on the need for unified verification methodologies as a verification solution. The implementation challenges that are faced by the SOC design and implementation solution were highlighted. The third talk on ‘Modelling and simulating software defined radios using MATLAB and SIMULINK’, by Mr.Ansuman Barik, Cranes Software International Ltd., Bangalore started with an introduction about Matlab and Simulink and software defined radios (SDRs). He then discussed the challenges in the SDR design and implementation. He also gave a solution example for the design with RF satellite link. He concluded with the explanation of hardware implementation of SDRs. The fourth talk on ‘Embedded systems for SOC’, by Mr. Jegan Ardhanari, Senior Application Engineer, Wind River systems, Bangalore touched on the compelling situations of moving towards SOC design.

The talk emphasized the various steps involved in the design and development of SOC product. The need for innovation, the opportunity provided by the industry and the software development challenges were touched upon. Problems on hardware software co-verification and IP development tools were also discussed. The talk concluded with an explanation of the core and reconfigurable logics of the SOC.