|
|
VLSI
Tools
| |
Digital
IC Design using FPGA |
|
Vendor |
HDL
Simulation |
Synthesis |
Place
and Route |
FPGA |
|
Cadence |
Nclaunch(NCVHDL,
NCVERILOG)
Verilog XL, Leapfrog |
|
|
--------------- |
|
Mentor
Graphics |
ModelSim |
Leonardo
Spectrum |
|
Any
FPGA Vendor |
|
Xilinx |
Xilinx
Foundation Series
------------------------------------> |
Xilinx
only |
|
Altera |
Quartus
II
--------------------------------------------------------> |
Altera
only |
|
ASIC
Design using SCL, Chandigarh Process Design Kit (PDK) |
|
Vendor |
Simulation |
Synthesis |
Place
& Route |
Layout |
gdsil
=> FAB
o/p => IC |
|
|
|
|
|
|
|
|
Cadence |
Nclaunch
(NCVHDL,
NCVERILOG)
Verilog XL,
Leapfrog(VHDL) |
Ambit Builgates,
RTL Compiler |
Silicon
Ensemble,
Nano encounter,
CeltIC crosstalk
analyzer |
DIVA
Verification
suite, Spectre
SPICE
Simulator |
SCL,
Chandigarh |
|
Mentor
Graphics |
ModelSim |
Leonardo
Spectrum |
|
|
|
|
Analog
IC Design using NCSU CDK and SCL PDK |
|
Vendor |
Circuit
Simulation |
Layout
Verification&Extraction |
Output |
|
|
|
|
|
|
Cadence |
Spectre
(SPICE)
Simulator |
DIVA
Verification Suite |
GDSII
to Foundry |
|
Berkeley
University |
SPICE |
|
|
*Windows version of SPICE3 is
also available.
#Allegro PCB design tool from cadence is also available.
|
Kits
Available |
|
|
|
Universal
FPGA Trainer System |
|
Xilinx
Spartran XC2S50(+dsp code composer support available) |
|
Xilinx
Spartran XC2S50 |
|
Xilinx
Spartran XC2S50 |
|
Altera
ACEX EP1K50QC208 -3 |
|
Altera
ACEX EP1K50QC208 -3 |
|
Altera
FLEX EPF10K20Rc240 -A |
| |
|
Silicon
Microsystems Kit |
|
Xilinx
XC9572(CPLD) |
|
Xilinx
XC4003EP(FPGA) |
|